This commit adds two macros that lets check whether a given value can
fit an arbitrary number of bits, either as a signed or as an unsigned
number.

The native emitter code backends perform a lot of bit size checks to see
if a particular code sequence can be emitted instead of a generic one,
and each platform backend has its own ad-hoc macros (usually one per bit
count and signedness).

With these macros there's a single way to perform those checks, plus
there's no more chance for off-by-one mask length errors when dealing
with signed numbers.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>

This commit expands the implementation of Viper load/store operations
that are optimised for the RV32 platform.

Given the way opcodes are encoded, all value sizes are implemented with
only two functions - one for loads and one for stores.  This should
reduce duplication with existing operations and should, in theory, save
space as some code is removed.  Both load and store emitters will
generate the shortest possible sequence (as long as the stack pointer is
not involved), using compressed opcodes when possible.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>

This commit expands the implementation of Viper load/store operations
that are optimised for the Arm platform.

Now both load and store emitters should generate the shortest possible
sequence in all cases.  Redundant specialised operation emitters have
been folded into the general case implementation - this was the case of
integer-indexed load/store operations with a fixed offset of zero.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>

This commit expands the implementation of Viper load/store operations
that are optimised for the Xtensa platform.

Now both load and store emitters should generate the shortest possible
sequence in all cases.  Redundant specialised operation emitters have
been aliased to the general case implementation - this was the case of
integer-indexed load/store operations with a fixed offset of zero.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>

This commit removes load/store opcode implementations that have been
made redundant in 1f5ba69.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>

This commit expands the implementation of Viper load/store operations
that are optimised for the x86 platform.

Unlike other platforms, x86 already implemented all necessary
functions and all it took to expose these to Viper after the
infrastructure refactoring was to add a few defines.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>

This commit expands the implementation of Viper load/store operations
that are optimised for the x86 platform.

Like x86, x64 already implemented all necessary functions and all it
took to expose these to Viper after the infrastructure refactoring
was to add a few defines.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>

This commit reworks the Viper pointer boundary tests in order to make
them more accurate and easier to extend.

The tests are now easier to reason about in their output, using easier
to read values, and bit thresholds are now more configurable.  If a new
conditional code sequence is introduced, adding a new bit threshold is
just a matter of adding a value into a tuple at the beginning of the
relevant test file.

Load tests have also been made more accurate, with better function
templates to test register-indexed operations.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>

This commit introduces a mechanism to customise the code that is
injected to the board when performing a test file upload and execution.

A new argument, --begin", is added so regular Python code can be
inserted in the injected fragment between the module file creation and
the effective file import.  This is needed for running larger tests
(usually ones that have been pre-compiled with
"--via-mpy --emit native") on ESP8266, as that board does not have
enough memory to fit certain blocks of code unless additional
configuration is performed.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>

This commit cleans up the single entry point integer-indexed load/store
emitters that have been built by merging the single operand type
load/store functions in 1f5ba69.

To follow the same convention found in RV32 and Xtensa emitters, the
function operand size is not named after the left shift amount to apply
to the initial offset to get its true byte offset, but by a generic
"operand size".

Also, those functions were updated to use the new MP_FIT_UNSIGNED macros
to perform bit width checks when figuring out which opcode encoding is
the best one to use.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>